The trend in the design of consumer electronics is to build portable electronic appliances (e.g., personal digital assistants, cell phones, etc.) that are capable of communicating via two or more radio protocols (e.g., WiFi, Bluetooth, etc.) concurrently, and this mandates that the processor within the appliance be capable of responding to multiple low-latency-tolerant events.
The requirement that a processor be capable of responding to multiple low-latency-tolerant events has, in general, meant that the processor needed to be fast. A fast processor, however, uses a great deal of wattage and, therefore, drains a portable electronic appliance's batteries quickly, which is, of course, most disadvantageous.
The need exists, therefore, for the development of a processor that is capable of capable of responding to multiple low-latency-tolerant events concurrently and with moderate power consumption.